What got people genuinely excited was not just the spec bump. It was the move from
Xtensa to RISC-V in a mainstream ESP32 tier. That makes bare-metal work feel less trapped in vendor-specific toolchains, and it improves the story for
Rust and other modern language stacks. That enthusiasm came with an important caveat: once you touch Wi-Fi, Bluetooth, USB, or other radio-heavy blocks, you are still living with vendor SDKs and closed firmware pieces. The core ISA is more open. The whole platform is not.
A lot of the useful discussion was about where this chip actually fits. It looks strong for edge devices that need one familiar software stack across Wi-Fi,
BLE, and optional wired networking. It also looks unusually good for embedded DSP-style work, thanks to SIMD, image-oriented hardware, and a programmable BitScrambler block that several people compared to the Raspberry Pi Pico’s
PIO in spirit. That said, the “edge AI” pitch got cut down fast. People expect wake-word detection, simple classifiers, maybe modest audio models. They do not expect modern vision models or image-to-image transformers to fit or run well. Memory, not ALU throughput, is the wall.
The comments also surfaced a few practical gotchas. Gigabit Ethernet support means a MAC with external
PHY requirements, not a magic one-chip router. Bluetooth audio remains shaky for serious low-latency music use, and newer Espressif parts still do not look like great classic Bluetooth audio platforms. Some peripheral choices will block drop-in upgrades from older ESP32 variants. Naming remains confusing to outsiders, but embedded engineers mostly defended it as normal MCU-family naming tied to
SDK compatibility, not ISA. The overall mood was simple: Espressif keeps shipping a lot of capability at aggressive prices, and the S31 looks like another chip that will end up everywhere once modules and cheap dev boards spread through the channel.